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UDC 681.32 Microcontrollers application for neural network implementation Vladislav Andreevich Rudnev, officer of the department of Computer Network and Telecommunications, South Ural State University, Chelyabinsk, Russian Federation, info@comp.susu.ac.ru Abstract Classification of neural network architecture on the basis of hardware components is given in the article. A range of processors implementing neural networks is described. Keywords neural network, neuro chip, processor References 1. Gribachev, V.P. Nastoyashchee i budushchee nejronnyh setej / V.P. Gribachev // Komponenty i tekhnologii. – 2006. – № 5. – S. 34–40. 2. SHahnov, V. Nejrokomp'yutery — arhitektura i realizaciya / V. SHahnov, A. Vlasov, A. Kuznecov. – http://chipnews.gaw.ru/html.cgi/arhiv/00_07/ stat_36.htm 3. http://www.module.ru/ruproducts/proc/nm6403.shtml#descr (sajt firmy NTC «Modul'»). 4. Grinyaev, S. Nejronnye processory Intel / S. Grinyaev // Komp'yuterra. – 2001. – № 38. – http://pgpu.penza.com.ru/_sites/intel/MATVEYEV_DM/materials/article_neuroprointel.html Source Bulletin of the South Ural State University. Ser. Computer Technologies, Automatic Control, Radio Electronics, 2012, iss. 16, no. 23 (282), pp. 181-183. (in Russ.) (Brief Reports) |